Mostly Unfinished

revision 2a - received a couple weeks ago; including a snazzy...

Tue, 01 May 2012 19:19:00 -0500

revision 2a - received a couple weeks ago; including a snazzy ground plane.

Revision 2a ordered

Sun, 25 Mar 2012 22:16:19 -0500

I will do a more through post in the next few days, but I’ve since received & populated my rev.2 boards and fully proved them. I managed to freeze one AVR chip by setting the fuses incorrectly, but once I replaced that and set them [correctly!] it seems to be happy.

The board had a few minor silkscreen errors (labels in the wrong position,) and so since I have a friend who wants one, I decided to do another spin to correct those and to add a ground plane. As most things are in EagleCAD, it’s pretty easy once you understand the way Eagle works.

Lessons Learned

Sat, 25 Feb 2012 21:16:13 -0600

While the AVR portion of my board works perfectly, I’ve had difficulty making the power & CPLD circuitry work. As I write this, I have just sent rev.2 to the board house and I’m hoping their turnaround time is quicker than last time.

Some things I’ve learned while destroying my board in an effort to make it work:

Adjustable voltage regulators have a different pinout from standard 5V LM7805. When this is incorrect, you send 13V down the ‘out’ instead of the ‘in’.
Voltage dividers do not work for power circuitry. While I’m sure the answer has to do KVL or other properly explained physics; the programmer in me is just going to accept it and move on. My solution (albeit a bit of a hack,) is to just drive the AVR at 3.3V - which it seems okay with - and make the voltage regulator output 3.3V across the board. This eliminates the resistors and allowed me to shorten the board up; making it cheaper to produce in the process.
When using EagleCAD and organizing your board layout - make sure that things like decoupling capacitors are near the pins they are meant to be decoupling. The ‘rats-nest’ function will optimize them away and combine in them ways that don’t exactly meet their intended purpose.
Trying to desolder a surface mount IC without a hot-air gun is a fruitless endeavor. Not enough pins come free at any one time and if you try to pry it up, you take pads with it.

Here is a photo of the board fully populated. This was taken...

Tue, 14 Feb 2012 21:59:00 -0600

Here is a photo of the board fully populated. This was taken before I took the exacto-knife and soldering iron back to it several times.

The circuit boards arrived about a week ago. It’s pretty...

Sun, 12 Feb 2012 22:03:00 -0600

The circuit boards arrived about a week ago. It’s pretty cool to see my design in physical form. I’ve since populated it and found several errors, one of them pretty bad. The AVR part of the circuit works great, but the power supply and CPLD are not happy. I will post more photos of the process, but long story short - I’m going to be making a rev.2; but I’m hoping to get rev.1 working 100% before I do so.

CPLD+Ethernet?

Wed, 25 Jan 2012 21:51:00 -0600

I believe I have all the parts I need to assemble my PCB when it arrives… I’m putting together an idea for an actual useful project using at least the AVR portion of my development board. I’ll post more about it when I actually start on it, but it has something to do with our furnace going out last weekend.

Anyways, I’ve come across the idea of ‘bit-banging’ a UDP packet out via Ethernet — rather than supporting the entire Ethernet/IP stack. The fpga4fun.com site is good at providing a starting point for lots of different problems. I don’t believe he still updates it, but he has enough out there to be a valuable resource.

http://www.fpga4fun.com/10BASE-T0.html

I’m curious if the CPLD is large enough to run this Verilog program… i’m guessing not, but might be fun to try…

Dakota Jazz Club - a brief review

Mon, 16 Jan 2012 10:24:10 -0600

I was asked, via email, to submit our comments about the Dakota Jazz Club to the coupon site from which we had obtained a $10 coupon. I thought it made for a decent quick-hit blog post - so I copy-pasted my text below.

Overall a decent but not great experience. The pork tenderloin & short ribs dishes were excellent, but the pommes frites were disappointing. The ketchup served alongside was literally just a Heinz bottle—we sort of expected a homemade ketchup for the price/setting. The bacon in the chocolate cake caused it to be disappointing. Wine prices were fairly high for by-the-glass, we only had two total because of it. Service was good overall. I doubt we will rush back, unless we are going for a performance; it did not seem like a good value.

boards ordered, mistake found

Tue, 10 Jan 2012 12:49:18 -0600

I ordered my PCB’s last night, and already this morning I found a [minor] mistake. I had added a rudimentary power supply to the board in case you wanted to use it apart from a USB/pin-sourced voltage source. However, in my rush, I assumed that the circuit I was creating output 5V AND 3.3V, whereas it is outputting one or the other. I think I can hack in some resistors once the boards arrive to divide 5V down to 3.3V, or worst case, just cut the traces and require an external 3.3V source.

it helps to have the right pin...

Sun, 08 Jan 2012 19:47:00 -0600

I was finally successful in getting my CPLD to blink an LED on and off. Thanks to a bunch of Googling, I figured out how to set the AVR’s fuse-bits to output it’s own internal clock on port B0, and once I actually routed it into the correct CPLD input (had it in P44 instead of P43,) it worked!

I believe the next step is to finalize my board design and get it ordered.

CPLDs 101 - days 2-4

Fri, 06 Jan 2012 22:03:21 -0600

I’ve learned a fair amount in the past few days, but I imagine a formally trained EE-type out there would’ve known all of this already. I hope my experiences illuminate the path for other software people interested in dabbling in some more advanced electronics/programmable-logic.

I ordered a knockoff(?) Xilinx USB JTAG cable from eBay a couple weeks ago, and after about 3 hours of trying to make it work, nothing. The next day, I installed an older version of Xilinx ISE (12.2-which was specifically mentioned on the listing) and I made it work after only a couple tries. It recognized my hand-soldered XC9536XL right away-as my previous post’s image shows-which is a nice boost to the ego. I then endeavored to write a simple Verilog “program” which would toggle an LED on and off.

aside: calling anything written in Verilog (or VHDL) a program is probably incorrect as you are not describing a sequential series of events, rather you are describing how a bunch of gates and other circuitry will be hooked together to achieve your desired effect.

The result of my code was nothing other than a half-lit LED, which extinguished itself as soon as I probed it with a multimeter.

Following some “application notes” and other online guidance, I wired some decoupling capacitors to the board in the appropriate places figuring that would solve it. Nothing. I was about to give up for the evening, when browsing through options inside of the Xilinx environment, I discovered my critical error:

I had selected the wrong chip package in Xilinx ISE (PC44 instead of VQ44). I basically told it I had an apple when in fact, I had an orange. So when I said “do something with pin #1” it probably interpreted it as “do something with pin #37”.

Another crucial fact I just learned after much Googling: CPLD’s do not come with their own internal clocks. So any code that I write in response to a clock-edge will do exactly nothing… which is most of the code that I’m interested in.

The final discovery of the evening was that the platform cable wants power applied to it from outside of USB. It took me several minutes of trying to get the cable working again tonight to figure out that fact, and once it’s hooked up to my board’s power source, it’s [mostly] reliable.

So that’s where I’m leaving it tonight, probably a good thing I haven’t ordered my boards yet as now I have to make sure to correctly incorporate an external clock signal.

success! details to follow at some point…

Thu, 05 Jan 2012 12:46:08 -0600

success! details to follow at some point…

First ever surface-mount soldering completed. Surprised at how...

Sat, 31 Dec 2011 14:19:32 -0600

First ever surface-mount soldering completed. Surprised at how fast my respective DigiKey and SparkFun orders got here. I guess I jumped in at the deep end with a VQFP44 package and not just individual resistors/capacitors/etc. Big lesson I learned is that you don’t need too much solder - had a few ugly bridges to cleanup on the first couple sides. But in the end, each trace tests fine and I don’t believe there are any bridges.

Pretty sure this is only the second device (and first open source device) I’ve come across,...

Thu, 29 Dec 2011 10:57:00 -0600

Pretty sure this is only the second device (and first open source device) I’ve come across, admittedly without looking too terribly hard, that utilizes the flexibility of FPGA’s to have their programming updated.

http://dangerousprototypes.com/docs/Open_Bench_Logic_Sniffer

This is the first revision of my development board. I...

Wed, 28 Dec 2011 21:19:00 -0600

This is the first revision of my development board. I couldn’t come up with a great name, so it’s called the ‘tiger’ board; for right now anyways… after my wife’s cat. The plan is to expose most pins of an AVR micro and a Xilinx CPLD independently. It should be programmable by their respective programs, but the massive # of breakouts will allow me to combine them in different ways. The circuit board came out a bit larger than I anticipated, mainly due to needing a lot of space for labels (important for a dev board,) so the cost may be a bit higher. I’m not sure if I should order it now since lead times take several weeks, but I will probably wait at least a few days to think about it more and make sure there are no glaring errors.

JTAG "standard"

Fri, 23 Dec 2011 15:33:43 -0600

For now I’m going to use this blog as an engineering journal of sorts. If I continue to post, it probably won’t be exclusively nerd territory, but it will be steered firmly in that direction.

I am planning to create a development board of sorts as a learning exercise in several things: surface mount soldering skills, microcontrollers, and CPLDs/FPGAs. I’ve researched the latter two perhaps the most of all, trying to determine the cheapest route to create something useful and hold my interest. One of the acronyms floating around all of these devices is JTAG. It’s a standard that encompasses many uses, notably debugging hardware and in the case of devices that require programming, twiddling bits to install new code into programmable hardware.

Some things I have learned:

JTAG defines the 4-5 pins that must be exposed - TDI, TDO, TCK, TMS, TRST (optional) - see the wikipedia entry for more info.
There are some programming standards such as XVSF that can be used to program devices such as CPLDs using JTAG.
Each hardware manufacturer has their own cable and header spec. Xilinx, for example, seems to be 2 rows of 7 pins, spaced at 2mm instead of 0.1” (100 mils). So to program a Xilinx development board, you need a Xilinx cable, and in all likelihood, a Xilinx programmer to talk to the Xilinx software. Some exceptions and workarounds seem to exist, such as using the Dangerous Prototypes Bus Pirate to program a CPLD. example
Whether you buy a Bus Pirate or a knockoff(?) Xilinx JTAG USB Platform Cable (see eBay,) the price seems to range from about $30-$50.
When creating ones own board, it is a wise idea to explore the specific JTAG requirements of each component up front. I am planning to go the Xilinx route, so I’ll probably put a 2x7-2mm header on the board. With a ‘flying’ cable, the header doesn’t matter as much, as long as the pins (see above) are there.

My interpretation of JTAG is: your device must expose at least 4 signals/pins and follow a standard protocol of signalling using said pins to your respective devices. That’s it. Everything else is up to the manufacturer of how easy or difficult they want to make it to use and what it’s used for. It’s not much of a standard really.

http://www.bigmessowires.com/

Mon, 19 Dec 2011 20:45:00 -0600

http://www.bigmessowires.com/:

This blog is becoming one of my favorite entries in my RSS reader. Lots of cool acronyms like: CPLD, ISP… I admire the fact that his projects may have a limited (but very devoted) appeal, he sticks with it and sees it through to completion. I have a hard time sticking to a project that I’m not being paid to do, especially if I find someone else on the internet who has already done it. I think that’s an obstacle I need to overcome.

Anyways, check it out if you’re into emulation, reverse engineering, or making new stuff work with old hardware.

minutiae

Mon, 19 Dec 2011 16:49:00 -0600

Hobbies enumerated, approximately in decreasing order of importance:

Cycling
Cooking, Food, and Local Restaurants
Electronics
Coding
Photography
Wine, Beer, etc.
Cars and Road Racing (F1, ALMS, MotoGP, etc.)
Golf
Games
Reading
Writing
Guitar
Tennis

Things I have time, money, or motivation for in any given week:

[pick two]

This is just a rambling post to see how this Tumblr thing works. I might turn it into a geeky blog type thing about code or electronics or whatever.